Principal/Sr Principal FPGA/ASIC UVM Verification Engineer

Northrop Grumman’s Strategic Space Systems Digital Hardware and IC Department in Gilbert, AZ is seeking a talented Principal or Sr Principal FPGA/ASIC Advance Verification Engineer.

By collaborating with Systems, Software, and other FPGA/ASIC engineers, you will be a critical hands-on verification engineer responsible for verifying complex FPGA/ASIC designs for high-reliability space applications.  We are seeking a motivated, innovative, and detail-oriented engineer who can efficiently and creatively produce verification testbenches for FPGA/ASIC designs for network communications, command and control, and digital signal processing for use in next generation space systems.  This position requires an individual that has strong, efficient, and out-going communication skills to be effective on high-performance development teams that consist of developers residing across multiple Northrop Grumman engineering development centers.   As a critical developer, you'll have the opportunity to develop a deep understanding of advance space systems to enable you to produce the most effective FPGA/ASIC verification solutions.

You will have the opportunity to mentor junior engineers in a rapidly expanding organization as well as engage with Northrop Grumman's space systems subject matter experts.  This role is eligible for relocation assistance and Hybrid work environment in Gilbert, Arizona for well qualified candidates. Employees who are working in Hybrid roles will work regularly both onsite and offsite.

 
This position’s standard work schedule is a 9/80. The 9/80 schedule allows employees who work a nine-hour day Monday through Thursday to take every other Friday off.

BASIC QUALIFICATIONS:

• Degree in electrical/electronic engineering, computer engineering, or related digital engineering degree and

  • 9+ years of engineering experience with a bachelor’s degree or 7+ years of engineering experience with a master's degree for a Sr Principal position

  • 5+ years of engineering experience with a bachelor’s degree or 3+ years of engineering experience with a master's degree for a Principal position

• 3+ years’ experience verifying FPGAs or ASICs with SystemVerilog UVM

• Dept of Defense Secret level with a background investigation date within 10 years OR Dept of Energy L clearance with a background investigation date within 10 years

This requisition may be filled as a T03 or T04.

PREFERRED QUALIFICATIONS:

• Technical team leadership experience.

• 5+ years’ experience with SystemVerilog UVM, UVM Framework, or OVM

• Experience with verifying DSP or SOC Designs

• MATLAB Experience

• Expertise in generating verification review artifacts.

DigitalHardwareEngineering

The health and safety of our employees and their families is a top priority. The company encourages employees to remain up-to-date on their COVID-19 vaccinations. U.S. Northrop Grumman employees may be required, in the future, to be vaccinated or have an approved disability/medical or religious accommodation, pursuant to future court decisions and/or government action on the currently stayed federal contractor vaccine mandate under Executive Order 14042 https://www.saferfederalworkforce.gov/contractors/.

Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for most positions.