Staff FPGA/ASIC Verification Engineer

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.

Northrop Grumman Space Systems is seeking a motivated candidate to join the Electronics and Payloads Directorate as a Staff FPGA/ASIC Verification Engineer. The selected applicant will become a pivotal part of the implementation of Digital Communication Designs for space applications. This position is based at our Space Park campus in Manhattan Beach, CA.

Primary responsibilities include, but not limited to:

• Leads development of high-level and detailed verification test bench consistent with requirements and specifications

• Develop verification environment utilizing UVMF/UVM

• Perform randomized and directed test to achieve closure on functional and code coverage

• Trace requirement, and perform review and audits on the simulation test procedures and test environment

• Mentor and oversee a small team of verification engineers

The successful candidate will have demonstrated the following:

• Experience in architecture and development of UVM benches or multi-chip UVM testbench for different types of designs

• Ability to create/develop Agents, Test sequences, Covergroups, Predictors, Scoreboards

• Ability to use Questa Advanced Functional Verification tools to report coverage

• Ability to create a block level UVM testbench from bottoms up.

• Experienced in writing assertions with SVA (System Verilog Assertion)

• Have written reconfigurable/modular verification IPs for custom interfaces and protocols

• Ability to develop UVM environments using different verification techniques/topologies (third-party VIPs, System C/C++ reference model, integration of block level environments into system level)

• Ability to create an infrastructure to report functional coverage statistics during verification execution and provide feedback to team to reach 100% functional coverage

• Maintain the desire to stay current in the continuously developing field and to expand knowledge base and skills in digital ASIC/FPGA verification

• Work under minimal direction

Basic Qualifications:

• Bachelor's Degree in Electrical or Computer Engineering or another STEM Bachelor's Degree with 14+ years of engineering experience; or STEM Master's Degree with 12+ years of engineering experience; or STEM PhD. Degree with 9+ years of engineering experience

• Expertise in System Verilog

• Advanced knowledge of UVM/OVM methodology

• Must have the ability to obtain and maintain an active Government security clearance

Preferred Qualifications:

• Experience with FPGA/ASIC verification with directed test

• Digital Signal Processing experience for digital communications

• Hands-on lab experience with testing of digital hardware is highly desired

• Understand UVM’s emulation concepts, hardware-assisted emulation (Veloce or similar products, not emulation in the lab)

• Active Secret Clearance Northrop Grumman is committed to hiring and retaining a diverse workforce.

digitalhardwareengineering

LosAngelesSpace

Salary Range: $171,600 USD - $257,400 USD

Employees may be eligible for a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.

The health and safety of our employees and their families is a top priority. The company encourages employees to remain up-to-date on their COVID-19 vaccinations. U.S. Northrop Grumman employees may be required, in the future, to be vaccinated or have an approved disability/medical or religious accommodation, pursuant to future court decisions and/or government action on the currently stayed federal contractor vaccine mandate under Executive Order 14042 https://www.saferfederalworkforce.gov/contractors/.

Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for most positions.