Staff FPGA/ASIC Verification Engineer
Requisition ID: 21007392
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Category: Engineering
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Location: Manhattan Beach, California
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US Citizenship Required for this Position: Yes
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Clearance Type: None
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Telecommute: Yes –May Consider Occasional/Part Time Teleworking for this position
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Shift: 1st Shift
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Travel Required: Yes, 10 % of the Time
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Positions Available: 2
Embark on a career putting innovative, reliable, and agile products and ideas into orbit, and beyond. Northrop Grumman has opportunities waiting for you that play a vital role in human space exploration, national defense, and scientific discovery, supporting multiple programs across the universe. With us, you’ll discover a culture of curiosity and collaboration that will have you Defining Possible from the day you start. Our space systems connect and protect millions of people on earth every day, now and for the future. Explore your future and launch your career today.
Northrop Grumman Space Systems is seeking a motivated candidate to join the Electronics and Payloads Directorate as a Staff FPGA/ASIC Verification Engineer. The selected applicant will become a pivotal part of the implementation of Digital Communication Designs for space applications. This position is based at our Space Park campus in Manhattan Beach, CA.
Primary responsibilities include, but not limited to:
• Leads development of high-level and detailed verification test bench consistent with requirements and specifications
• Develop verification environment utilizing UVMF/UVM
• Perform randomized and directed test to achieve closure on functional and code coverage
• Trace requirement, and perform review and audits on the simulation test procedures and test environment
• Mentor and oversee a small team of verification engineers The successful candidate will have demonstrated the following: • Experience in architecture and development of UVM benches or multi-chip UVM testbench for different types of designs • Ability to create/develop Agents, Test sequences, Covergroups, Predictors, Scoreboards • Ability to use Questa Advanced Functional Verification tools to report coverage • Ability to create a block level UVM testbench from bottoms up. • Experienced in writing assertions with SVA (SystemVerilog Assertion) • Have written reconfigurable/modular verification IPs for custom interfaces and protocols • Ability to develop UVM environments using different verification techniques/topologies (third-party VIPs, System C/C++ reference model, integration of block level environments into system level) • Ability to create an infrastructure to report functional coverage statistics during verification execution and provide feedback to team to reach 100% functional coverage • Maintain the desire to stay current in the continuously developing field and to expand knowledge base and skills in digital ASIC/FPGA verification • Work under minimal direction For more Electronics and Payloads openings visit: URL: www.northropgrumman.com/jobs/elepay Unique ID: elepay http://www.northropgrumman.com/jobs/southbayjob/ Unique ID: SOUTHBAYJOB LosAngelesSpace
Primary responsibilities include, but not limited to:
• Leads development of high-level and detailed verification test bench consistent with requirements and specifications
• Develop verification environment utilizing UVMF/UVM
• Perform randomized and directed test to achieve closure on functional and code coverage
• Trace requirement, and perform review and audits on the simulation test procedures and test environment
• Mentor and oversee a small team of verification engineers The successful candidate will have demonstrated the following: • Experience in architecture and development of UVM benches or multi-chip UVM testbench for different types of designs • Ability to create/develop Agents, Test sequences, Covergroups, Predictors, Scoreboards • Ability to use Questa Advanced Functional Verification tools to report coverage • Ability to create a block level UVM testbench from bottoms up. • Experienced in writing assertions with SVA (SystemVerilog Assertion) • Have written reconfigurable/modular verification IPs for custom interfaces and protocols • Ability to develop UVM environments using different verification techniques/topologies (third-party VIPs, System C/C++ reference model, integration of block level environments into system level) • Ability to create an infrastructure to report functional coverage statistics during verification execution and provide feedback to team to reach 100% functional coverage • Maintain the desire to stay current in the continuously developing field and to expand knowledge base and skills in digital ASIC/FPGA verification • Work under minimal direction For more Electronics and Payloads openings visit: URL: www.northropgrumman.com/jobs/elepay Unique ID: elepay http://www.northropgrumman.com/jobs/southbayjob/ Unique ID: SOUTHBAYJOB LosAngelesSpace
Basic Qualifications:
• Bachelor's Degree in Electrical or Computer Engineering or another STEM Bachelor's Degree with 14+ years of experience; or STEM Master's Degree with 12+ years of experience; or STEM PhD. Degree with 9+ years of experience
• Expertise in System Verilog
• Advanced knowledge of UVM/OVM methodology
• Must have the ability to obtain and maintain an active Government security clearance Preferred Qualifications:
• Experience with FPGA/ASIC verification with directed test
• Digital Signal Processing experience for digital communications
• Hands-on lab experience with testing of digital hardware is highly desired.
• Understand UVM’s emulation concepts, hardware-assisted emulation (Veloce or similar products, not emulation in the lab)
• Active Secret Clearance
Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit www.northropgrumman.com/EEO. U.S. Citizenship is required for most positions.
• Bachelor's Degree in Electrical or Computer Engineering or another STEM Bachelor's Degree with 14+ years of experience; or STEM Master's Degree with 12+ years of experience; or STEM PhD. Degree with 9+ years of experience
• Expertise in System Verilog
• Advanced knowledge of UVM/OVM methodology
• Must have the ability to obtain and maintain an active Government security clearance Preferred Qualifications:
• Experience with FPGA/ASIC verification with directed test
• Digital Signal Processing experience for digital communications
• Hands-on lab experience with testing of digital hardware is highly desired.
• Understand UVM’s emulation concepts, hardware-assisted emulation (Veloce or similar products, not emulation in the lab)
• Active Secret Clearance
Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit www.northropgrumman.com/EEO. U.S. Citizenship is required for most positions.
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What's great about
What's great about
Northrop Grumman
- Be part of a culture that thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work.
- Use your skills to build and deliver innovative tech solutions that protect the world and shape a better future.
- Enjoy benefits like work-life balance, education assistance and paid time off.
Did you know?
We offer an array of benefits to give you the support you need, including matching 401K, tuition assistance, health insurance and wellness options, coaching, mentoring and more.
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